Alle materialen zetten uit en krimpen bij temperatuursverandering, dit wordt de thermische uitzettingscoëfficiënt (CTE) genoemd. CTE wordt uitgedrukt in delen per miljoen verandering per graad C, weergegeven als (ppm/°C). Waar en hoe het laminaat uitzet, beïnvloedt de werking van de Printed Circuit Board op verschillende manieren.
De x-y uitzetting van het oppervlak heeft ernstige gevolgen als componenten gevoelig zijn voor de uitzetting van de PCB waaraan ze gesoldeerd zijn. Componenten zoals grote silicium-chip-pakketten (LBGA's), kunnen de soldeerverbindingen beschadigen omdat de PCB aan een hogere snelheid uitzet (18 ppm/°C) dan de grote silicium-chip die slechts aan 6 ppm/°C uitzet. Het herhaaldelijke verschil in uitzetting creëert schuifkrachten op de soldeerverbindingen die na verloop van tijd spanningen en microscheurtjes veroorzaken en na een voldoende aantal thermische testcycli (typisch -65°C tot +125°C) zal dit uiteindelijk leiden tot verharding van het soldeer en scheuren van de soldeerverbindingen zelf. De daaruit voortvloeiende intermitterende functionaliteit van het toestel is onaanvaardbaar in veeleisende thermische situaties met hoge betrouwbaarheid, zoals militaire wapensystemen of medische apparatuur.
The temperate changes can also be exacerbated by extreme over temperature (i.e. exceeding the glass transition temperature – Tg) over a number of heating cycles, such as too many soldering cycles during assembly. Example one thermal over cycle to wave solder the pcb, one over temperature cycle to solder the chips and a third over thermal cycle to solder the large capacitors. In the manufacture and assembly of the PCB, limiting thermal cycles over Tg is very important as it affects the number of future operating thermal cycles. Tests have shown that three thermal assembly cycles above Tg is the equivalent to over 1000 future thermal cycles to 80 deg C.
There are lower x-y CTE laminates which can reduce the expansion of the PCB and reduce the chance of solder joint cracking. The other method is to control the temperature and number of thermal high low temperature cycles the PCB will be exposed to by improved choices in the cabinet and cooling methods.
Thermal Stress Cracking in PCB Assembly
One other area the CTE of PCB can affect the reliability of the PCB assembly is in thermal stress cracking of the via copper plating, with repeated thermal cycles.
The expansion of PCB materials is volumetric by temperature rise, however the laminate construction is such that x-y expansion, and z-axis are significantly different.
The restraining glass fabric in the laminate, prevents the resin from expanding isotropically (the same amount in all directions) therefore the x, y expansion will be significantly less than the z axis
The resin volume expansion, (glass does not expand by much) is controlled by the high young’s modulus (strength of the expansion force) of the stronger glass laminated within the x-y circuit layers. This simply means that the resin is restricted from moving in the x-y axis by the lower expansion rate of the glass laminate, therefore it must expand in the z axis. Unfortunately, this means that the resin will expand significantly more in the unconstrained z axis and will apply stress to the plated copper in the vias.
The z-axis coefficient of thermal expansion increases sharply (as much as four to fourteen times that of the x-y axis) when the temperature rises close to the Tg. In a typical PCB laminate this means the z axis is expanding from 50 to 200 ppm/ °C at the Tg, compared to 15 ppm/ °C in the x-y axis.
A typical multilayer printed circuit board has a CTE of 16-18 ppm/°C. The lowest CTE of PCB for any resin/fiber system will almost always be that with the lowest resin concentration. It is possible, to make laminates with CTE’s that are very low. Being careful in the selection of laminate and prepregs that will not suffer from resin starvation. Starvation is the lack of resin to flow and fully fill the inner layer copper pattern gaps. Various laminate systems have been designed to control the z axis CTE, a few were successful but many were not, the ones that did work such as Kevlar are very expensive and availability is poor.
However, there does exist an easier method to limit via cracking, within high reliability PCB’s.
The z axis resin expands without restriction of the glass fibres. This expansion has enough force (Youngs modulus) that with a large number of thermal cycles the pressure exerted by the expanding resin will crack and rip the thin copper via plating apart and create a stress crack leading to intermittent or an electrical open through the via. The z-axis expansion increases more as temperature approaches T/g to more than double what it was before, as much as 120 ppm/°C.
The copper in a plated through hole has to have enough ductility or it will crack during normal thermal cycling. Ductility is the ability of the copper to stretch and shrink with pressure. This is tested and strictly controlled within the copper plating bath. However, when a PCB is subjected to large expansion forces of 120 ppm/°C, there is too little copper in the via to fully stretch in the z axis. After a few cycles, the copper will start to work harden through stretching and its ductility will begin to diminish. The result is cracked plated through holes and pad lifting.
There is however a simple fix for this reliability problem, plate a bit more copper in the via. Through tests it has been found that a copper via .059 inches long with a copper thickness of over 1.5 oz of plating is now mechanically strong enough to physically resist and stop the lower Young’s modules pressure of the expanding resin. By starting with thinner base copper i.e. ¼ oz or less the little bit of extra copper plated in the hole and surface tracks is not noticed. On thicker PCB’s of .093 and above even more copper is needed in the via to stop cracking if exposed to large thermal cycle temperatures.
The resulting slightly thicker copper in the vias has been shown to pass over 3000 thermal expansion cycles, greatly improving thermal cycling reliability.